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CODES
2009
IEEE
15 years 1 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
AHS
2006
IEEE
145views Hardware» more  AHS 2006»
15 years 1 months ago
The Gannet Service-Based SoC: A Service-level Reconfigurable Architecture
We propose a novel type of dynamically reconfigurable System-on-Chip architecture, the Gannet service-based architecture. This novel concept addresses the issue of systemlevel rec...
Wim Vanderbauwhede
IPPS
1999
IEEE
15 years 1 months ago
An Object-Oriented Environment for Sparse Parallel Computation on Adaptive Grids
Many numerical solutions of large scale simulation models require finer discretizations in some regions of the computational grid. When this region is not known in advance, adapti...
Salvatore Filippone, Michele Colajanni, Dario Pasc...
DATE
2003
IEEE
109views Hardware» more  DATE 2003»
15 years 3 months ago
Run-Time Management of Logic Resources on Reconfigurable Systems
Dynamically reconfigurable systems based on partial and dynamically reconfigurable FPGAs may have their functionality partially modified at run-time without stopping the operation...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...
ERSA
2004
130views Hardware» more  ERSA 2004»
14 years 11 months ago
Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware
Abstract-- Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and hig...
Ronald Scrofano, Viktor K. Prasanna