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DATE
2006
IEEE
88views Hardware» more  DATE 2006»
15 years 10 months ago
Temporal partitioning for image processing based on time-space complexity in reconfigurable architectures
Temporal partitioning techniques are useful to implement large and complex applications, which can be split into partitions in FPGA devices. In order to minimize resources, each o...
Paulo Sérgio B. do Nascimento, Manoel Euseb...
ISPAN
1999
IEEE
15 years 8 months ago
Evaluation of a Semi-Static Approach to Mapping Dynamic Iterative Tasks onto Heterogeneous Computing Systems
To minimize the execution time of an iterative application in a heterogeneous parallel computing environment, an appropriate mapping scheme is needed for matching and scheduling th...
Yu-Kwong Kwok, Anthony A. Maciejewski, Howard Jay ...
145
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HPDC
2002
IEEE
15 years 9 months ago
Distributed Computing with Load-Managed Active Storage
One approach to high-performance processing of massive data sets is to incorporate computation into storage systems. Previous work has shown that this active storage model is effe...
Rajiv Wickremesinghe, Jeffrey S. Chase, Jeffrey Sc...
IEEEPACT
1999
IEEE
15 years 8 months ago
Cameron: High level Language Compilation for Reconfigurable Systems
This paper presents the Cameron Project 1 , which aims to provide a high level, algorithmic language and optimizing compiler for the development of image processing applications o...
Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm...
ICDCS
2011
IEEE
14 years 3 months ago
Provisioning a Multi-tiered Data Staging Area for Extreme-Scale Machines
—Massively parallel scientific applications, running on extreme-scale supercomputers, produce hundreds of terabytes of data per run, driving the need for storage solutions to im...
Ramya Prabhakar, Sudharshan S. Vazhkudai, Youngjae...