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» Parallel matrix algorithms and applications
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2006
IEEE
219views Hardware» more  DATE 2006»
15 years 10 months ago
Low cost LDPC decoder for DVB-S2
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) algorithm is gaining increased attention in communication standards and literature. The ne...
John Dielissen, Andries Hekstra, Vincent Berg
IPPS
2005
IEEE
15 years 9 months ago
GHS: A Performance System of Grid Computing
Conventional performance evaluation mechanisms focus on dedicated distributed systems. Grid computing infrastructure, on another hand, is a shared collaborative environment constr...
Xian-He Sun, Ming Wu
IPPS
2003
IEEE
15 years 9 months ago
Accurate Method for Fast Design of Diagnostic Oligonucleotide Probe Sets for DNA Microarrays
We present a method for the automatic generation of oligonucleotide probe sets for DNA microarrays. This approach is well suited particularly for specificity evaluation of design...
Andreas Krause, Markus Kräutner, Harald Meier
148
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IPPS
2002
IEEE
15 years 9 months ago
Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines
The increasing gap between processor and memory performance has led to new architectural models for memory-intensive applications. In this paper, we use a set of memory-intensive ...
Brian R. Gaeke, Parry Husbands, Xiaoye S. Li, Leon...
IPPS
2000
IEEE
15 years 8 months ago
Fast Synchronization on Scalable Cache-Coherent Multiprocessors using Hybrid Primitives
This paper presents a new methodology for implementing fast synchronization on scalable cache-coherent multiprocessors, through the use of hybrid primitives. Hybrid primitives lev...
Dimitrios S. Nikolopoulos, Theodore S. Papatheodor...