269 search results - page 16 / 54 » Parallel performance tuning for Haskell |
89
Voted
EUROPAR
2006
Springer
15 years 4 months ago
2006
Springer
In the past, research on Multiprocessor Systems-on-Chip (MPSoC) has focused mainly on increasing the available processing power on a chip, while less effort was put into specific s...
109
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IPCCC
2006
IEEE
15 years 6 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
136
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TCSV
2010
14 years 7 months ago
2010
Abstract--Real-time stereo vision is attractive in many applications like robot navigation and 3D scene reconstruction. Data parallel platforms, e.g. GPU, is often used for real-ti...
99
Voted
SIGMETRICS
1996
ACM
15 years 4 months ago
1996
ACM
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...
74
Voted
IPPS
2003
IEEE
15 years 5 months ago
2003
IEEE
This work targets the emerging use of software component technology for high-performance scientific parallel and distributed computing. While component software engineering will ...