94 search results - page 4 / 19 » Parallel placement for field-programmable gate arrays |
87
Voted
IPPS
1998
IEEE
15 years 1 months ago
1998
IEEE
Abstract. The inherently sequential nature of random discrete eventdriven simulation has made parallel and distributed processing di cult. This paper presents a method of applying ...
ICRA
1994
IEEE
15 years 1 months ago
1994
IEEE
We describe a cost-effective method for developing parallel architectures which increase the performance of range and image sensors. A parametrised edge detector and its systolic ...
61
Voted
FPGA
2003
ACM
15 years 2 months ago
2003
ACM
Placement and routing are the most time-consuming processes in automatically synthesizing and configuring circuits for field-programmable gate arrays (FPGAs). In this paper, we ...
IJCNN
2000
IEEE
15 years 2 months ago
2000
IEEE
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
104
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IPPS
1999
IEEE
15 years 2 months ago
1999
IEEE
This paperpresents new resultson anapproach for solvingsatisfiability problems (SAT), that is, creating a logic circuit that is specialized to solve each problem instance on Field ...