94 search results - page 8 / 19 » Parallel placement for field-programmable gate arrays |
IPPS
1999
IEEE
15 years 2 months ago
1999
IEEE
An e cient implementations of the main building block in the RSA cryptographic scheme is achieved by mapping a bit-level systolic array for modular exponentiation onto Xilinx FPGAs...
IPPS
2002
IEEE
15 years 2 months ago
2002
IEEE
Reconfigurable computing based on partial reconfiguration of field programmable gate arrays (FPGAs) is yet to move to the mainstream of computing. Hardware devices that support su...
IFIP12
2007
14 years 11 months ago
2007
In this paper an efficient architecture for natural language processing is presented, implemented in hardware using FPGAs (Field Programmable Gate Arrays). The system can receive s...
IGARSS
2009
14 years 7 months ago
2009
The main purpose of this paper is to describe available (HPC)based implementations of remotely sensed hyperspectral image processing algorithms on multi-computer clusters, heterog...
77
Voted
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...