104 search results - page 6 / 21 » Parallel processor scheduling with delay constraints |
GLVLSI
2003
IEEE
15 years 4 months ago
2003
IEEE
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...
111
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ICPP
1998
IEEE
15 years 3 months ago
1998
IEEE
This paper presents a new schedulability analysis methodology for distributed hard real-time systems with bursty job arrivals. The schedulability is analyzed by comparing worst-ca...
HPCA
2006
IEEE
15 years 12 months ago
2006
IEEE
We propose dynamic scheduler designs to improve the scheduler scalability and reduce its complexity in the SMT processors. Our first design is an adaptation of the recently propos...
117
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HPCC
2007
Springer
15 years 5 months ago
2007
Springer
Many of today’s embedded systems, such as wireless and portable devices rely heavily on the limited power supply. Therefore, energy efficiency becomes one of the major design con...
RTCSA
2006
IEEE
15 years 5 months ago
2006
IEEE
ILP (Instruction Level Parallelism) processors are being increasingly used in embedded systems. In embedded systems, instructions may be subject to timing constraints. An optimisi...