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ICPP
1993
IEEE
15 years 10 months ago
Dependence Analysis and Architecture Design for Bit-Level Algorithms
:. In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-...
Weijia Shang, Benjamin W. Wah
ECOOPW
1994
Springer
15 years 10 months ago
Abstracting Interactions Based on Message Sets
ing Interactions Based on Message Sets Svend Frr 1 and Gul Agha2. 1 Hewlett-Packard Laboratories, 1501 Page Mill Road, Palo Alto, CA 94303 2 University of Illinois, 1304 W. Springf...
Svend Frølund, Gul Agha
164
Voted
ICS
1993
Tsinghua U.
15 years 10 months ago
Anatomy of a Message in the Alewife Multiprocessor
Shared-memory provides a uniform and attractive mechanism for communication. For efficiency, it is often implemented with a layer of interpretive hardware on top of a message-pas...
John Kubiatowicz, Anant Agarwal
168
Voted
HPCN
1994
Springer
15 years 10 months ago
Three-Dimensional Simulation of Semiconductor Devices
The exact knowledge of the heat flow in heterojunction bipolar transistors (HBT) during power operation is an important key factor for the systematic improvement of power density,...
Wilfried Klix, Ralf Dittmann, Roland Stenzel
ASPDAC
2007
ACM
119views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
Jianhua Liu, Yi Zhu, Haikun Zhu, Chung-Kuan Cheng,...