3656 search results - page 725 / 732 » Parallel programming in Split-C |
168
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MICRO
2010
IEEE
15 years 3 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
134
Voted
BMCBI
2010
15 years 4 months ago
2010
Background: Chromatin immunoprecipitation (ChIP) followed by high-throughput sequencing (ChIP-seq) or ChIP followed by genome tiling array analysis (ChIP-chip) have become standar...
105
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ISCA
1996
IEEE
15 years 8 months ago
1996
IEEE
Many studies have investigated performance improvement through exploiting instruction-level parallelism (ILP) with a particular architecture. Unfortunately, these studies indicate...
150
Voted
CASES
2006
ACM
15 years 8 months ago
2006
ACM
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
152
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CC
2006
Springer
15 years 8 months ago
2006
Springer
The polyhedral model is known to be a powerful framework to reason about high level loop transformations. Recent developments in optimizing compilers broke some generally accepted ...