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» Parallel simulation of chip-multiprocessor architectures
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ICDCS
2011
IEEE
14 years 1 months ago
Provisioning a Multi-tiered Data Staging Area for Extreme-Scale Machines
—Massively parallel scientific applications, running on extreme-scale supercomputers, produce hundreds of terabytes of data per run, driving the need for storage solutions to im...
Ramya Prabhakar, Sudharshan S. Vazhkudai, Youngjae...
DCOSS
2005
Springer
15 years 7 months ago
Design of Adaptive Overlays for Multi-scale Communication in Sensor Networks
In wireless sensor networks, energy and communication bandwidth are precious resources. Traditionally, layering has been used as a design principle for network stacks; hence routin...
Santashil PalChaudhuri, Rajnish Kumar, Richard G. ...
FPL
2009
Springer
172views Hardware» more  FPL 2009»
15 years 6 months ago
Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...
Nachiket Kapre, André DeHon
HPCA
2012
IEEE
13 years 9 months ago
BulkSMT: Designing SMT processors for atomic-block execution
Multiprocessor architectures that continuously execute atomic blocks (or chunks) of instructions can improve performance and software productivity. However, all of the prior propo...
Xuehai Qian, Benjamin Sahelices, Josep Torrellas
IPPS
2006
IEEE
15 years 8 months ago
Dynamic resource allocation of computer clusters with probabilistic workloads
Real-time resource scheduling is an important factor for improving the performance of cluster computing. In many distributed and parallel processing systems, particularly real-tim...
Marwan S. Sleiman, Lester Lipsky, Robert Sheahan