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» Parallel simulation of chip-multiprocessor architectures
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SAMOS
2009
Springer
15 years 8 months ago
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture
We believe that future many-core architectures should support a simple and scalable way to execute many threads that are generated by parallel programs. A good candidate to impleme...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic
CAMP
2005
IEEE
15 years 3 months ago
Energy/Performance Evaluation of the Multithreaded Extension of a Multicluster VLIW Processor
Abstract— In this paper we address the problem of the architectural exploration from the energy/performance point of view of a VLIW processor for embedded systems. We also consid...
Domenico Barretta, Gianluca Palermo, Mariagiovanna...
SIPS
2007
IEEE
15 years 8 months ago
Sphere Decoding for Multiprocessor Architectures
Motivated by the need for high throughput sphere decoding for multipleinput-multiple-output (MIMO) communication systems, we propose a parallel depth-first sphere decoding (PDSD)...
Qi Qi, Chaitali Chakrabarti
ISPDC
2008
IEEE
15 years 8 months ago
Performance Analysis of Grid DAG Scheduling Algorithms using MONARC Simulation Tool
This paper presents a new approach for analyzing the performance of grid scheduling algorithms for tasks with dependencies. Finding the optimal procedures for DAG scheduling in Gr...
Florin Pop, Ciprian Dobre, Valentin Cristea
IPPS
1997
IEEE
15 years 6 months ago
A Customizable Simulator for Workstation Networks
We present a customizable simulator called netsim for high-performance point-to-point workstation networks that is accurate enough to be used for application-level performance ana...
Mustafa Uysal, Anurag Acharya, Robert Bennett, Joe...