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» Parallel simulation of chip-multiprocessor architectures
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CPHYSICS
2010
135views more  CPHYSICS 2010»
15 years 2 months ago
An events based algorithm for distributing concurrent tasks on multi-core architectures
In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...
David W. Holmes, John R. Williams, Peter Tilke
BILDMED
2007
108views Algorithms» more  BILDMED 2007»
15 years 3 months ago
Surgical Cutting on a Multimodal Object Representation
In this paper, we present the design of our surgery simulator under the aspects of multimodal object representation and parallelization on multicore architectures. Special focus is...
Lenka Jerábková, Torsten Kuhlen
ISCA
1992
IEEE
151views Hardware» more  ISCA 1992»
15 years 6 months ago
An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Threads
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yos...
228
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CGF
2011
14 years 8 months ago
A Parallel SPH Implementation on Multi-Core CPUs
This paper presents a parallel framework for simulating fluids with the Smoothed Particle Hydrodynamics (SPH) method. For low computational costs per simulation step, efficient ...
Markus Ihmsen, Nadir Akinci, Markus Becker, Matthi...
SPAA
2005
ACM
15 years 7 months ago
Parallelizing time with polynomial circuits
We study the problem of asymptotically reducing the runtime of serial computations with circuits of polynomial size. We give an algorithmic size-depth tradeoff for parallelizing ...
Ryan Williams