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» Parallel simulation of chip-multiprocessor architectures
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PROCEDIA
2011
14 years 4 months ago
A Multilevel Parallelism Support for Multi-Physics Coupling
A new challenge in scientific computing is to merge existing simulation models to create new higher fidelity combined (often multi-level) models. While this challenge has been a...
Fang Liu, Masha Sosonkina
ASAP
2005
IEEE
112views Hardware» more  ASAP 2005»
15 years 7 months ago
On the Advantages of Serial Architectures for Low-Power Reliable Computations
This paper explores low-power reliable microarchitectures for addition. Power, speed, and reliability (both defect- and fault-tolerance) are important metrics of system design, sp...
Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray R...
ICPR
2004
IEEE
16 years 3 months ago
From Massively Parallel Image Processors to Fault-Tolerant Nanocomputers
Parallel processors such as SIMD computers have been successfully used in various areas of high performance image and data processing. Due to their characteristics of highly regula...
Jie Han, Pieter Jonker
SC
2005
ACM
15 years 7 months ago
Cross-Platform Performance Prediction of Parallel Applications Using Partial Execution
Performance prediction across platforms is increasingly important as developers can choose from a wide range of execution platforms. The main challenge remains to perform accurate...
Leo T. Yang, Xiaosong Ma, Frank Mueller
MM
2000
ACM
217views Multimedia» more  MM 2000»
15 years 6 months ago
Design and implementation of the parallel multimedia file system based on message distribution
The two-layered distributed clustered server architecture consisting of a control server and a group of storage servers has been widely used to support multimedia file systems. Wi...
Seung-Ho Park, Si-Yong Park, Gwang Moon Kim, Ki-Do...