770 search results - page 88 / 154 » Parallel simulation of chip-multiprocessor architectures |
137
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HPCA
2001
IEEE
16 years 2 months ago
2001
IEEE
This paper introduces a router delay model that accurately models key aspects of modern routers. The model accounts for the pipelined nature of contemporary routers, the specific ...
106
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GLOBECOM
2008
IEEE
15 years 8 months ago
2008
IEEE
— Time-interleaved (TI) analog-to-digital converters (ADCs) are a promising architecture for realizing the highspeed ADCs required to implement “mostly digital” receivers for...
ICDCSW
2007
IEEE
15 years 8 months ago
2007
IEEE
Peer-to-Peer (P2P) systems are currently used in a variety of applications. File sharing applications and ad hoc networking have fueled the usage of these systems. P2P systems gen...
118
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ISCA
1999
IEEE
15 years 6 months ago
1999
IEEE
In the pursuit of instruction-level parallelism, significant demands are placed on a processor's instruction delivery mechanism. Delivering the performance necessary to meet ...
124
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VISUALIZATION
1999
IEEE
15 years 6 months ago
1999
IEEE
Computer simulation and digital measuring systems are now generating data of unprecedented size. The size of data is becoming so large that conventional visualization tools are in...