770 search results - page 89 / 154 » Parallel simulation of chip-multiprocessor architectures |
134
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HOTI
2005
IEEE
15 years 7 months ago
2005
IEEE
: The exposed memory hierarchies employed in many network processors (NPs) are expensive in terms of meeting the worst-case processing requirement. Moreover, it is difficult to ef...
125
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MSWIM
2006
ACM
15 years 8 months ago
2006
ACM
The simulation of wireless networks has been an important tool for researchers and the industry in the last years. Especially in the field of Mobile Ad Hoc Networking, most curre...
142
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ICDCS
2007
IEEE
15 years 5 months ago
2007
IEEE
As a key approach to achieve energy efficiency in sensor networks, sensing coverage has been studied extensively. Researchers have designed many coverage protocols to provide vario...
122
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CASES
2008
ACM
15 years 4 months ago
2008
ACM
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
144
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IPPS
2010
IEEE
14 years 12 months ago
2010
IEEE
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...