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» Parallel simulation of chip-multiprocessor architectures
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PPL
2008
185views more  PPL 2008»
15 years 1 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
128
Voted
IEEEPACT
2007
IEEE
15 years 8 months ago
Architectural Support for the Stream Execution Model on General-Purpose Processors
There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream progra...
Jayanth Gummaraju, Mattan Erez, Joel Coburn, Mende...
MIDDLEWARE
2004
Springer
15 years 7 months ago
Architecture for resource allocation services supporting interactive remote desktop sessions in utility grids
Emerging large scale utility computing systems like Grids promise computing and storage to be provided to end users as a utility. System management services deployed in the middle...
Vanish Talwar, Bikash Agarwalla, Sujoy Basu, Raj K...
JSA
2000
116views more  JSA 2000»
15 years 1 months ago
Distributed vector architectures
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
Stefanos Kaxiras
114
Voted
ISCA
2011
IEEE
287views Hardware» more  ISCA 2011»
14 years 5 months ago
Scalable power control for many-core architectures running multi-threaded applications
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
Kai Ma, Xue Li, Ming Chen, Xiaorui Wang