36 search results - page 7 / 8 » Parallel techniques for physically based simulation on multi... |
158
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HPCA
2005
IEEE
16 years 2 months ago
2005
IEEE
Hardware transactional memory should support unbounded transactions: transactions of arbitrary size and duration. We describe a hardware implementation of unbounded transactional ...
116
Voted
IPPS
2009
IEEE
15 years 9 months ago
2009
IEEE
Various studies have shown that OS jitter can degrade parallel program performance considerably at large processor counts. Most sources of system jitter fall broadly into 5 catego...
115
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PDP
2010
IEEE
15 years 6 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
142
Voted
FPGA
2007
ACM
15 years 8 months ago
2007
ACM
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
153
Voted
CLADE
2003
IEEE
15 years 7 months ago
2003
IEEE
With rapid technological advances in network infrastructure, programming languages, compatible component interfaces and so many more areas, today the computational Grid has evolve...