Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Previous simulators for shared-memory architectures have imposed a large tradeoff between simulation accuracy and speed. Most such simulators model simple processors that do not e...
In this paper we present an adaptation of the Dual Priority Scheduling Algorithm to schedule both hard realtime periodic tasks and soft-aperiodic tasks in shared memory multiproce...
To understand the principles of information processing in the brain, we depend on models with more than 105 neurons and 109 connections. These networks can be described as graphs o...
Hans E. Plesser, Jochen M. Eppler, Abigail Morriso...
Run-time parallelization is often the only way to execute the code in parallel when data dependence information is incomplete at compile time. This situation is common in many imp...