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ICCD
1997
IEEE
123views Hardware» more  ICCD 1997»
15 years 8 months ago
A Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process. All previous work in parallel simulated annealing bas...
John A. Chandy, Prithviraj Banerjee
CAL
2008
15 years 4 months ago
A Parallel Deadlock Detection Algorithm with O(1) Overall Run-time Complexity
This article proposes a novel parallel, hardware-oriented deadlock detection algorithm for multiprocessor system-on-chips. The proposed algorithm takes full advantage of hardware ...
Jaehwan John Lee, Xiang Xiao
C3S2E
2011
ACM
14 years 7 months ago
A parallel LLL algorithm
The LLL algorithm is a well-known and widely used lattice basis reduction algorithm. In many applications, its speed is critical. Parallel computing can improve speed. However, th...
Yixian Luo, Sanzheng Qiao
RSCTC
2004
Springer
138views Fuzzy Logic» more  RSCTC 2004»
15 years 9 months ago
A Parallel Approximate Rule Extracting Algorithm Based on the Improved Discernibility Matrix
A parallel rule-extracting algorithm based on the improved discernibility matrix [2] is proposed, by this way, a large amount of raw data can be divided into some small portions to...
Yong Liu, Congfu Xu, Yunhe Pan
ICIAP
1999
ACM
15 years 8 months ago
Improved Low Complexity Fully Parallel Thinning Algorithm
A fully parallel iterative thinning algorithm called MB2 is presented. It favourably competes with the best known algorithms regarding homotopy, mediality; thickness, rotation inv...
Thierry M. Bernard, Antoine Manzanera