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ASAP
2003
IEEE
107views Hardware» more  ASAP 2003»
15 years 9 months ago
Energy Aware Register File Implementation through Instruction Predecode
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
José L. Ayala, Marisa Luisa López-Va...
163
Voted
AI
2003
Springer
15 years 9 months ago
A Formal Theory for Describing Action Concepts in Terminological Knowledge Bases
This paper introduces a formal theory for describing actions in terminological knowledge bases, closely related to description logics. It deals in particular with the problem of ad...
Christel Kemke
FPL
2003
Springer
164views Hardware» more  FPL 2003»
15 years 9 months ago
Fast, Large-Scale String Match for a 10Gbps FPGA-Based Network Intrusion Detection System
Intrusion Detection Systems such as Snort scan incoming packets for evidence of security threats. The most computation-intensive part of these systems is a text search against hund...
Ioannis Sourdis, Dionisios N. Pnevmatikatos
137
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FCCM
2002
IEEE
146views VLSI» more  FCCM 2002»
15 years 9 months ago
Fast Area Estimation to Support Compiler Optimizations in FPGA-Based Reconfigurable Systems
Several projects have developed compiler tools that translate high-level languages down to hardware description languages for mapping onto FPGAbased reconfigurable computers. Thes...
Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker...
ISCA
2000
IEEE
63views Hardware» more  ISCA 2000»
15 years 8 months ago
An embedded DRAM architecture for large-scale spatial-lattice computations
Spatial-lattice computations with finite-range interactions are an important class of easily parallelized computations. This class includes many simple and direct algorithms for ...
Norman Margolus
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