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IPPS
2010
IEEE
15 years 3 months ago
Inter-block GPU communication via fast barrier synchronization
The graphics processing unit (GPU) has evolved from a fixedfunction processor with programmable stages to a programmable processor with many fixed-function components that deliver...
Shucai Xiao, Wu-chun Feng
DATE
1998
IEEE
153views Hardware» more  DATE 1998»
15 years 9 months ago
An Energy-Conscious Exploration Methodology for Reconfigurable DSPs
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
Jan M. Rabaey, Marlene Wan
JELIA
1990
Springer
15 years 9 months ago
Semantic Interpretation as Higher-Order Deduction
Traditional accounts of the semantic interpretation of quantified phrases and its interaction with reference and ellipsis have relied on formal manipulations of logical forms (qua...
Fernando C. N. Pereira
149
Voted
FPGA
2004
ACM
140views FPGA» more  FPGA 2004»
15 years 8 months ago
Using reconfigurability to achieve real-time profiling for hardware/software codesign
Embedded systems combine a processor with dedicated logic to meet design specifications at a reasonable cost. The attempt to amalgamate two distinct design environments introduces...
Lesley Shannon, Paul Chow
KBSE
2000
IEEE
15 years 8 months ago
Simultaneous Checking of Completeness and Ground Confluence
c specifications provide a powerful method for the specification of abstract data types in programming languages and software systems. Completeness and ground confluence are fundam...
Adel Bouhoula
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