Abstract. The Numerical Algorithms Group Ltd is currently participating in the European HPCN Fourth Framework project on Parallel Industrial NumErical Applications and Portable Lib...
The scheduler is a key component in determining the overall performance of a parallel computer, and as we show here, the schedulers in wide use today exhibit large unexplained gap...
This paper surveys and places into perspective a number of results concerning the D-BSP (Decomposable Bulk Synchronous Parallel) model of computation, a variant of the popular BSP ...
Gianfranco Bilardi, Carlo Fantozzi, Andrea Pietrac...
Abstract. The functional performance model (FPM) of heterogeneous processors has proven to be more realistic than the traditional models because it integrates many important featur...
Binary Decision Diagrams (BDDs) are widely used in formal verification. They are also widely known for consuming large amounts of memory. For larger problems, a BDD computation wi...