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» Parallelism through Digital Circuit Design
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ISQED
2011
IEEE
240views Hardware» more  ISQED 2011»
12 years 9 months ago
Fast optimization of nano-CMOS mixed-signal circuits through accurate metamodeling
—Design optimization methodologies for AMS-SoCs with analog, digital, and mixed-signal portions have not received significant attention, due to their high complexity. In mixed-s...
Oleg Garitselov, Saraju P. Mohanty, Elias Kougiano...
VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
14 years 6 months ago
A Design of Analog C-Matrix Circuits Used for Signal/Data Processing
Various calculation of matrices and vectors has been used in many digital signal processing systems. Although the calculation simply repeats multiplication and addition, the reite...
Takayuki Sugawara, Yoshikazu Miyanaga, Norinobu Yo...
DAC
2009
ACM
14 years 7 months ago
Nanoscale digital computation through percolation
In this study, we apply a novel synthesis technique for implementing robust digital computation in nanoscale lattices with random interconnects: percolation theory on random graph...
Mustafa Altun, Marc D. Riedel, Claudia Neuhauser
IH
1998
Springer
13 years 10 months ago
Fingerprinting Digital Circuits on Programmable Hardware
Advanced CAD tools and high-density VLSI technologies have combined to create a new market for reusable digital designs. The economic viability of the new core-based design paradig...
John Lach, William H. Mangione-Smith, Miodrag Potk...
DATE
2000
IEEE
110views Hardware» more  DATE 2000»
13 years 10 months ago
Stochastic Modeling and Performance Evaluation for Digital Clock and Data Recovery Circuits
Clock and data recovery circuits are essential components in communication systems. They directly influence the bit-error-rate performance of communication links. It is desirable...
Alper Demir, Peter Feldmann