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FPL
2005
Springer
226views Hardware» more  FPL 2005»
15 years 3 months ago
A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC
A parallel MPEG-4 Simple Profile encoder for FPGA based multiprocessor System-on-Chip (SOC) is presented. The goal is a computationally scalable framework independent of platform....
Olli Lehtoranta, Erno Salminen, Ari Kulmala, Marko...
ICA3PP
2007
Springer
14 years 11 months ago
The Thread Migration Mechanism of DSM-PEPE
In this paper we present the thread migration mechanism of DSM-PEPE, a multithreaded distributed shared memory system. DSM systems like DSM-PEPE provide a parallel environment to h...
Federico Meza, Cristian Ruz
IEEEPACT
2008
IEEE
15 years 4 months ago
The PARSEC benchmark suite: characterization and architectural implications
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
Christian Bienia, Sanjeev Kumar, Jaswinder Pal Sin...
ICPP
2008
IEEE
15 years 4 months ago
Scalable Dynamic Load Balancing Using UPC
An asynchronous work-stealing implementation of dynamic load balance is implemented using Unified Parallel C (UPC) and evaluated using the Unbalanced Tree Search (UTS) benchmark ...
Stephen Olivier, Jan Prins
IPPS
2002
IEEE
15 years 2 months ago
Implementing the NAS Benchmark MG in SAC
SAC is a purely functional array processing language designed with numerical applications in mind. It supports generic, high-level program specifications in the style of APL. How...
Clemens Grelck