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ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
15 years 1 months ago
The MIT Alewife Machine: Architecture and Performance
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
Anant Agarwal, Ricardo Bianchini, David Chaiken, K...
IPPS
2003
IEEE
15 years 2 months ago
Extending OpenMP to Support Slipstream Execution Mode
OpenMP has emerged as a widely accepted standard for writing shared memory programs. Hardware-specific extensions such as data placement are usually needed to improve the scalabi...
Khaled Z. Ibrahim, Gregory T. Byrd
IPPS
2003
IEEE
15 years 2 months ago
Active Memory Techniques for ccNUMA Multiprocessors
Our recent work on uniprocessor and single-node multiprocessor (SMP) active memory systems uses address remapping techniques in conjunction with extended cache coherence protocols...
Daehyun Kim, Mainak Chaudhuri, Mark Heinrich
HPCA
1999
IEEE
15 years 1 months ago
WildFire: A Scalable Path for SMPs
Researchers have searched for scalable alternatives to the symmetric multiprocessor (SMP) architecture since it was first introduced in 1982. This paper introduces an alternative ...
Erik Hagersten, Michael Koster
ICS
2003
Tsinghua U.
15 years 2 months ago
Performance characteristics of openMP constructs, and application benchmarks on a large symmetric multiprocessor
With the increasing popularity of small to large-scale symmetric multiprocessor (SMP) systems, there has been a dire need to have sophisticated, and flexible development and runt...
Nathan R. Fredrickson, Ahmad Afsahi, Ying Qian