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» Parallelization of GSL: Performance of Case Studies
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PDP
2005
IEEE
15 years 3 months ago
A Comparison Study of the HLRC-DU Protocol versus a HLRC Hardware Assisted Protocol
SVM systems are a cheaper and flexible way to implement the shared memory programming paradigm. Their huge flexibility is due to their software implementation; however, this is al...
Salvador Petit, Julio Sahuquillo, Ana Pont
PC
1998
110views Management» more  PC 1998»
14 years 9 months ago
Compiler-Based Tools for Analyzing Parallel Programs
In this paper, we present several tools for analyzing parallel programs. The tools are built on top of a compiler infrastructure, which provides advanced capabilities for symbolic...
Brian Armstrong, Seon Wook Kim, Insung Park, Micha...
CISIS
2010
IEEE
15 years 3 months ago
Study of Variations of Native Program Execution Times on Multi-Core Architectures
Abstract—Program performance optimisations, feedbackdirected iterative compilation and auto-tuning systems [1] all assume a fixed estimation of execution time given a fixed inp...
Abdelhafid Mazouz, Sid Ahmed Ali Touati, Denis Bar...
CASES
2009
ACM
15 years 4 months ago
A buffer replacement algorithm exploiting multi-chip parallelism in solid state disks
Solid State Disks (SSDs) are superior to magnetic disks from a performance point of view due to the favorable features of NAND flash memory. Furthermore, thanks to improvement on...
Jinho Seol, Hyotaek Shim, Jaegeuk Kim, Seungryoul ...
ICS
2009
Tsinghua U.
15 years 4 months ago
Performance modeling and automatic ghost zone optimization for iterative stencil loops on GPUs
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
Jiayuan Meng, Kevin Skadron