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» Parallelization of GSL: Performance of Case Studies
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ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
15 years 2 months ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...
QUESTA
2010
131views more  QUESTA 2010»
14 years 8 months ago
Asymptotically optimal parallel resource assignment with interference
Motivated by scheduling in cellular wireless networks and resource allocation in computer systems, we study a service facility with two classes of users having heterogeneous servi...
Maaike Verloop, R. Núñez Queija
HPCA
2008
IEEE
15 years 10 months ago
Performance and power optimization through data compression in Network-on-Chip architectures
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
Reetuparna Das, Asit K. Mishra, Chrysostomos Nicop...
IPPS
1996
IEEE
15 years 1 months ago
A Parallel Solution to the Extended Set Union Problem with Unlimited Backtracking
In this paper, we study on the EREW-PRAM model a parallel solution to the extended set union problem with unlimited backtracking which maintains a dynamic partition of an n-elemen...
Maria Cristina Pinotti, Vincenzo A. Crupi, Sajal K...
DAC
2002
ACM
15 years 10 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik