6897 search results - page 1179 / 1380 » Parallelization of Modular Algorithms |
154
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ISCA
2005
IEEE
15 years 10 months ago
2005
IEEE
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
196
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ISVLSI
2005
IEEE
15 years 10 months ago
2005
IEEE
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
174
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EGC
2005
Springer
15 years 10 months ago
2005
Springer
Abstract. Grid technology is widely emerging as a solution for wide-spread applicability of computerized analysis and processing procedures in biomedical sciences. In this paper we...
140
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PODC
2004
ACM
15 years 10 months ago
2004
ACM
We present Byzantine Disk Paxos, an asynchronous shared-memory consensus algorithm that uses a collection of n > 3t disks, t of which may fail by becoming non-responsive or arb...
153
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ICS
2004
Tsinghua U.
15 years 10 months ago
2004
Tsinghua U.
Storage mapping optimization is a flexible approach to folding array dimensions in numerical codes. It is designed to reduce the memory footprint after a wide spectrum of loop tr...