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124
Voted
FCCM
2009
IEEE
15 years 10 months ago
2009
IEEE
The Ambric Massively Parallel Processor Array (MPPA) is a device that contains 336 32-bit RISC processors and is appropriate for embedded systems due to its relatively small physi...
137
Voted
PDP
2008
IEEE
15 years 10 months ago
2008
IEEE
This paper presents QLSE (QoS-constrained List Scheduling hEuristics), a Quality of Service-based launch time scheduling algorithm for wide area Grids. QLSE considers applications...
128
Voted
HPCC
2007
Springer
15 years 9 months ago
2007
Springer
Based on the renowned method of Bitton et al. (see [1]) we develop a concise but comprehensive analytical model for the well-known Binary Merge Sort, Bitonic Sort, Nested-Loop Join...
113
Voted
EUROPAR
2004
Springer
15 years 9 months ago
2004
Springer
Abstract. In this paper we report on our experiences with hybrid parallelism in PARDISO, a high-performance sparse linear solver. We start with the OpenMP-parallel numerical factor...
130
Voted
ICCS
2004
Springer
15 years 9 months ago
2004
Springer
We show in this paper how to evaluate the performance of skeleton-based high level parallel programs. Since many applications follow some commonly used algorithmic skeletons, we id...