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SIAMSC
2010
120views more  SIAMSC 2010»
15 years 2 months ago
Weighted Matrix Ordering and Parallel Banded Preconditioners for Iterative Linear System Solvers
The emergence of multicore architectures and highly scalable platforms motivates the development of novel algorithms and techniques that emphasize concurrency and are tolerant of ...
Murat Manguoglu, Mehmet Koyutürk, Ahmed H. Sa...
PPOPP
2010
ACM
15 years 11 months ago
Thread to strand binding of parallel network applications in massive multi-threaded systems
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
Petar Radojkovic, Vladimir Cakarevic, Javier Verd&...
CIAC
2000
Springer
210views Algorithms» more  CIAC 2000»
15 years 8 months ago
Computing a Diameter-Constrained Minimum Spanning Tree in Parallel
A minimum spanning tree (MST) with a small diameter is required in numerous practical situations. It is needed, for example, in distributed mutual exclusion algorithms in order to ...
Narsingh Deo, Ayman Abdalla
VIS
2008
IEEE
174views Visualization» more  VIS 2008»
16 years 5 months ago
Extensions of Parallel Coordinates for Interactive Exploration of Large Multi-Timepoint Data Sets
Parallel coordinate plots (PCPs) are commonly used in information visualization to provide insight into multi-variate data. These plots help to spot correlations between variables....
Jorik Blaas, Charl P. Botha, Frits H. Post
CJ
2006
84views more  CJ 2006»
15 years 4 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope