47 search results - page 2 / 10 » Parallelizing HMMER for Hardware Acceleration on FPGAs |
ARC
2010
Springer
15 years 2 months ago
2010
Springer
High-Performance Reconfigurable Computers (HPRCs) are parallel machines consisting of FPGAs and microprocessors, with the FPGAs used as co-processors. The execution of parallel app...
DATE
2005
IEEE
15 years 5 months ago
2005
IEEE
In this paper, the application of a cycle accurate binary translator for rapid prototyping of SoCs will be presented. This translator generates code to run on a rapid prototyping ...
IVC
2006
14 years 11 months ago
2006
The Multi-Sector Algorithm (MSA) is a simplification of the CORDIC algorithm to more closely meet the requirements for a real-time general Hough transform applications. The MSA ca...
105
click to vote
CHES
2009
Springer
16 years 4 days ago
2009
Springer
Abstract. This paper is devoted to the design of fast parallel accelerators for the cryptographic Tate pairing in characteristic three over supersingular elliptic curves. We propos...
ASAP
2008
IEEE
15 years 6 months ago
2008
IEEE
RNA structure prediction, or folding, is a computeintensive task that lies at the core of several search applications in bioinformatics. We begin to address the need for high-thro...