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ASAP
2006
IEEE
111views Hardware» more  ASAP 2006»
16 years 12 days ago
Fast Bit Compression and Expansion with Parallel Extract and Parallel Deposit Instructions
Current microprocessor instruction set architectures are word oriented, with some subword support. Many important applications, however, can realize substantial performance benefi...
Yedidya Hilewitz, Ruby B. Lee
JAVA
2001
Springer
15 years 10 months ago
A scalable, robust network for parallel computing
CX, a network-based computational exchange, is presented. The system’s design integrates variations of ideas from other researchers, such as work stealing, non-blocking tasks, e...
Peter R. Cappello, Dimitros Mourloukos
IPPS
2000
IEEE
15 years 10 months ago
MAJC-5200: A High Performance Microprocessor for Multimedia Computing
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
Subramania Sudharsanan
IPPS
2005
IEEE
15 years 12 months ago
Dynamic Reconfiguration of Mechatronic Real-Time Systems Based on Configuration State Machines
Data flow and FSMs are used intensively to specify real-time systems in the field of mechatronics. Their implementation in FPGAs is discussed against the background of dynamic rec...
Steffen Toscher, Roland Kasper, Thomas Reinemann
MM
2003
ACM
146views Multimedia» more  MM 2003»
15 years 11 months ago
Supporting timeliness and accuracy in distributed real-time content-based video analysis
Real-time content-based access to live video data requires content analysis applications that are able to process the video data at least as fast as the video data is made availab...
Viktor S. Wold Eide, Frank Eliassen, Ole-Christoff...