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ISCA
1993
IEEE
153views Hardware» more  ISCA 1993»
15 years 6 months ago
An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a writeinvalidate protocol result in invalidation actions that could be elimin...
Per Stenström, Mats Brorsson, Lars Sandberg
MICRO
1994
IEEE
81views Hardware» more  MICRO 1994»
15 years 6 months ago
Register file port requirements of transport triggered architectures
Exploitation of large amounts of instruction level parallelism requires a large amount of connectivity between the shared register file and the function units; this connectivity i...
Jan Hoogerbrugge, Henk Corporaal
160
Voted
MFCS
1994
Springer
15 years 6 months ago
A Proof System for Asynchronously Communicating Deterministic Processes
We introduce in this paper new communication and synchronization constructs which allow deterministic processes, communicating asynchronously via unbounded FIFO bu ers, to cope wi...
Frank S. de Boer, M. van Hulst
FOCS
1990
IEEE
15 years 6 months ago
Uniform Memory Hierarchies
We present several e cient algorithms for sorting on the uniform memory hierarchy UMH, introduced by Alpern, Carter, and Feig, and its parallelization P-UMH. We give optimal and ne...
Bowen Alpern, Larry Carter, Ephraim Feig
ISCA
1990
IEEE
186views Hardware» more  ISCA 1990»
15 years 6 months ago
Adaptive Software Cache Management for Distributed Shared Memory Architectures
An adaptive cache coherence mechanism exploits semantic information about the expected or observed access behavior of particular data objects. We contend that, in distributed shar...
John K. Bennett, John B. Carter, Willy Zwaenepoel
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