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DATE
2009
IEEE
85views Hardware» more  DATE 2009»
15 years 11 months ago
SCORES: A scalable and parametric streams-based communication architecture for modular reconfigurable systems
- Parallel architectures have become an increasingly popular method in which to achieve high performance with low power consumption. In order to leverage these benefits, applicatio...
Abelardo Jara-Berrocal, Ann Gordon-Ross
SASP
2009
IEEE
238views Hardware» more  SASP 2009»
15 years 11 months ago
Hardware acceleration of multi-view face detection
—This paper presents a parallelized architecture for hardware acceleration of multi-view face detection. In our architecture, the multi-view face detection system generates rotat...
Junguk Cho, Bridget Benson, Ryan Kastner
ICPP
2009
IEEE
15 years 11 months ago
Mapping the FDTD Application to Many-Core Chip Architectures
—This paper reports a study of mapping the Finite Difference Time Domain (FDTD) application to the IBM Cyclops64 (C64) many-core chip architecture [1]. C64 is chosen for this stu...
Daniel Orozco, Guang R. Gao
IPPS
2009
IEEE
15 years 11 months ago
EmBOINC: An emulator for performance analysis of BOINC projects
BOINC is a platform for volunteer computing. The server component of BOINC embodies a number of scheduling policies and parameters that have a large impact on the projects through...
Trilce Estrada, Michela Taufer, Kevin Reed, David ...
IPPS
2009
IEEE
15 years 11 months ago
Fast development of dense linear algebra codes on graphics processors
—We present an application programming interface (API) for the C programming language that facilitates the development of dense linear algebra algorithms on graphics processors a...
M. Jesús Zafont, Alberto F. Martín, ...