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133
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ICASSP
2008
IEEE
15 years 10 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
160
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IPPS
2008
IEEE
15 years 10 months ago
2008
IEEE
The advent of multicore processors requires mainstream concurrent programming languages with high level concurrency constructs and effective debugging techniques. Unfortunately, m...
123
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IPPS
2008
IEEE
15 years 10 months ago
2008
IEEE
While desktop grids are attractive platforms for executing parallel applications, their volatile nature has often limited their use to so-called “high-throughput” applications...
131
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ISPDC
2008
IEEE
15 years 10 months ago
2008
IEEE
We present a load-balancing technique that exploits the temporal coherence, among successive computation phases, in mesh-like computations to be mapped on a cluster of processors....
132
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CCGRID
2007
IEEE
15 years 10 months ago
2007
IEEE
Malleability enables a parallel application’s execution system to split or merge processes modifying granularity. While process migration is widely used to adapt applications to...