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ICPP
2002
IEEE
15 years 10 months ago
Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications
Code size expansion of software-pipelined loops is a critical problem for DSP systems with strict code size constraint. Some ad-hoc code size reduction techniques were used to try...
Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha
ICPPW
2002
IEEE
15 years 10 months ago
ARA - The Ant-Colony Based Routing Algorithm for MANETs
A mobile ad-hoc network (MANET) is a collection of mobile nodes which communicate over radio. These kind of networks are very flexible, thus they do not require any existing infr...
Mesut Günes, Udo Sorges, Imed Bouazizi
ITC
2002
IEEE
114views Hardware» more  ITC 2002»
15 years 10 months ago
Scan Power Reduction Through Test Data Transition Frequency Analysis
Significant reductions in test application times can be achieved through parallelizing core tests; however, simultaneous test of various cores may result in exceeding power thres...
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailog...
WORDS
2002
IEEE
15 years 10 months ago
Writing Temporally Predictable Code
The Worst-Case Execution-Time Analysis (WCET Analysis) of program code that is to be executed on modern processors is a highly complex task. First, it involves path analysis, to i...
Peter P. Puschner, Alan Burns
ADAEUROPE
2010
Springer
15 years 10 months ago
What to Make of Multicore Processors for Reliable Real-Time Systems?
Now that multicore microprocessors have become a commodity, it is natural to think about employing them in all kinds of computing, including high-reliability embedded real-time sy...
Theodore P. Baker