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» Parallelizing time with polynomial circuits
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96
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CNHPCA
2009
Springer
15 years 6 months ago
Development of a Scalable Solver for the Earth's Core Convection
A scalable parallel solver is developed to simulate the Earth’s core convection. With the help from the “multiphysics” data structure and the restricted additive Schwarz prec...
Chao Yang, Ligang Li, Yunquan Zhang
TVLSI
2002
130views more  TVLSI 2002»
14 years 11 months ago
Incremental compilation for parallel logic verification systems
Although simulation remains an important part of application-specific integrated circuit (ASIC) validation, hardware-assisted parallel verification is becoming a larger part of the...
R. Tessier, S. Jana
CORR
2006
Springer
112views Education» more  CORR 2006»
14 years 11 months ago
High-level synthesis under I/O Timing and Memory constraints
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
Philippe Coussy, Gwenolé Corre, Pierre Bome...
99
Voted
IPPS
2005
IEEE
15 years 5 months ago
Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores
The use of pipelined floating-point arithmetic cores to create high-performance FPGA-based computational kernels has introduced a new class of problems that do not exist when usi...
Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna
CCGRID
2004
IEEE
15 years 3 months ago
Lambda scheduling algorithm for file transfers on high-speed optical circuits
1 Scheduling resources on Grids is a well-known problem. The extension of Grids to LambdaGrids requires scheduling of lambdas, i.e., end-to-end high-speed circuits. In this paper, ...
Hua Lee, Malathi Veeraraghavan, Hojun Li, Edwin K....