151 search results - page 7 / 31 » Parallelizing while loops for multiprocessor systems |
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ICPP
1998
IEEE
15 years 2 months ago
1998
IEEE
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
IPPS
1996
IEEE
15 years 2 months ago
1996
IEEE
Advances in multiprocessor interconnect technologyare leading to high performance networks. However, software overheadsassociated with message passing are limiting the processors ...
LCPC
1998
Springer
15 years 2 months ago
1998
Springer
Techniques for aggressive optimization and parallelization of applications can have the side-effect of introducing copy instructions, register-to-register move instructions, into t...
ASAP
2003
IEEE
15 years 3 months ago
2003
IEEE
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
ICS
1999
Tsinghua U.
15 years 2 months ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...