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ISPD
2012
ACM
283views Hardware» more  ISPD 2012»
13 years 5 months ago
Low-power gated bus synthesis for 3d ic via rectilinear shortest-path steiner graph
In this paper, we propose a new approach for gated bus synthesis [16] with minimum wire capacitance per transaction in three-dimensional (3D) ICs. The 3D IC technology connects di...
Chung-Kuan Cheng, Peng Du, Andrew B. Kahng, Shih-H...
MMB
2012
Springer
259views Communications» more  MMB 2012»
13 years 5 months ago
Boosting Design Space Explorations with Existing or Automatically Learned Knowledge
Abstract. During development, processor architectures can be tuned and configured by many different parameters. For benchmarking, automatic design space explorations (DSEs) with h...
Ralf Jahr, Horia Calborean, Lucian Vintan, Theo Un...
POPL
2012
ACM
13 years 5 months ago
Resource-sensitive synchronization inference by abduction
We present an analysis which takes as its input a sequential program, augmented with annotations indicating potential parallelization opportunities, and a sequential proof, writte...
Matko Botincan, Mike Dodds, Suresh Jagannathan
PPOPP
2012
ACM
13 years 5 months ago
Chestnut: a GPU programming language for non-experts
Graphics processing units (GPUs) are powerful devices capable of rapid parallel computation. GPU programming, however, can be quite difficult, limiting its use to experienced prog...
Andrew Stromme, Ryan Carlson, Tia Newhall
PPOPP
2012
ACM
13 years 5 months ago
PARRAY: a unifying array representation for heterogeneous parallelism
This paper introduces a programming interface called PARRAY (or Parallelizing ARRAYs) that supports system-level succinct programming for heterogeneous parallel systems like GPU c...
Yifeng Chen, Xiang Cui, Hong Mei
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