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VLSID
2010
IEEE
181views VLSI» more  VLSID 2010»
15 years 1 months ago
Parametric Fault Diagnosis of Nonlinear Analog Circuits Using Polynomial Coefficients
We propose a method for diagnosis of parametric faults in analog circuits using polynomial coefficients of the circuit model [15]. As a sequel to our recent work [14], where circ...
Suraj Sindia, Virendra Singh, Vishwani D. Agrawal
DATE
2004
IEEE
110views Hardware» more  DATE 2004»
15 years 1 months ago
Interactive Cosimulation with Partial Evaluation
We present a technique to improve the efficiency of hardware-software cosimulation, using design information known at simulator compile-time. The generic term for such optimizatio...
Patrick Schaumont, Ingrid Verbauwhede
ATS
2009
IEEE
162views Hardware» more  ATS 2009»
15 years 4 months ago
Multi-tone Testing of Linear and Nonlinear Analog Circuits Using Polynomial Coefficients
—A method of testing for parametric faults of analog circuits based on a polynomial representation of fault-free function of the circuit is presented. The response of the circuit...
Suraj Sindia, Virendra Singh, Vishwani D. Agrawal
ASPDAC
2008
ACM
174views Hardware» more  ASPDAC 2008»
14 years 11 months ago
Chebyshev Affine Arithmetic based parametric yield prediction under limited descriptions of uncertainty
In modern circuit design, it is difficult to provide reliable parametric yield prediction since the real distribution of process data is hard to measure. Most existing approaches ...
Jin Sun, Yue Huang, Jun Li, Janet Meiling Wang
ASAP
2010
IEEE
171views Hardware» more  ASAP 2010»
14 years 9 months ago
General-purpose FPGA platform for efficient encryption and hashing
Many applications require protection of secret or sensitive information, from sensor nodes and embedded applications to large distributed systems. The confidentiality of data can b...
Jakub Szefer, Yu-Yuan Chen, Ruby B. Lee