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ICCAD
2008
IEEE
98views Hardware» more  ICCAD 2008»
15 years 6 months ago
Statistical path selection for at-speed test
Abstract— Process variations make at-speed testing significantly more difficult. They cause subtle delay changes that are distributed rather than the localized nature of a trad...
Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chan...
DATE
2006
IEEE
114views Hardware» more  DATE 2006»
15 years 3 months ago
An efficient static algorithm for computing the soft error rates of combinational circuits
Soft errors have emerged as an important reliability challenge for nanoscale VLSI designs. In this paper, we present a fast and efficient soft error rate (SER) computation algorit...
Rajeev R. Rao, Kaviraj Chopra, David Blaauw, Denni...
VTS
2000
IEEE
167views Hardware» more  VTS 2000»
15 years 1 months ago
Path Selection for Delay Testing of Deep Sub-Micron Devices Using Statistical Performance Sensitivity Analysis
The performance of deep sub-micron designs can be affected by various parametric variations, manufacturing defects, noise or even modeling errors that are all statistical in natur...
Jing-Jia Liou, Kwang-Ting Cheng, Deb Aditya Mukher...
DATE
2006
IEEE
91views Hardware» more  DATE 2006»
15 years 1 months ago
Efficient incremental clock latency scheduling for large circuits
The clock latency scheduling problem is usually solved on the sequential graph, also called register-to-register graph. In practice, the the extraction of the sequential graph for...
Christoph Albrecht
ATVA
2008
Springer
99views Hardware» more  ATVA 2008»
14 years 11 months ago
Model Checking Recursive Programs with Exact Predicate Abstraction
e Abstraction Arie Gurfinkel1 , Ou Wei2 , and Marsha Chechik2 1 Software Engineering Institute, Carnegie Mellon University 2 Department of Computer Science, University of Toronto A...
Arie Gurfinkel, Ou Wei, Marsha Chechik