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» Parametric Encryption Hardware Design
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CSE
2009
IEEE
15 years 4 months ago
On the Design of a Suitable Hardware Platform for Protocol Stack Processing in LTE Terminals
—In this paper we present a design methodology for the identification and development of a suitable hardware platform (including dedicated hardware accelerators) for the data pl...
Sebastian Hessel, David Szczesny, Shadi Traboulsi,...
GLVLSI
2005
IEEE
186views VLSI» more  GLVLSI 2005»
15 years 3 months ago
An FPGA design of AES encryption circuit with 128-bit keys
This paper addresses a pipelined partial rolling (PPR) architecture for the AES encryption. The key technique is the PPR architecture, which is suitable for FPGA implementation. U...
Hui Qin, Tsutomu Sasao, Yukihiro Iguchi
ICCAD
1995
IEEE
180views Hardware» more  ICCAD 1995»
15 years 1 months ago
Design based analog testing by Characteristic Observation Inference
In this paper, a new approach to analog test design based on the circuit design process, called Characteristic Observation Inference (COI), is presented. In many situations, it is...
Walter M. Lindermeir, Helmut E. Graeb, Kurt Antrei...
ISJGP
2010
14 years 6 months ago
On the Hardware Implementation Cost of Crypto-Processors Architectures
A variety of modern technologies such as networks, Internet, and electronic services demand private and secure communications for a great number of everyday transactions. Security ...
Nicolas Sklavos
APCCAS
2006
IEEE
245views Hardware» more  APCCAS 2006»
15 years 3 months ago
Digital Audio Broadcasting System Modeling and Hardware Implementation
— DAB is a growing communication technology for digital audio broadcasting and demands higher concentration on flexible and cost optimum implementations for use in new mobile ele...
Nariman Moezzi Madani, Hamed Holisaz, Seid Mehdi F...