93 search results - page 10 / 19 » Partial Order Reduction for Model Checking of Timed Automata |
73
Voted
CONCUR
2000
Springer
15 years 1 months ago
2000
Springer
Abstract. We consider the problem of automatically verifying realtime systems with continuously distributed random delays. We generalise probabilistic timed automata introduced in ...
IPPS
2005
IEEE
15 years 3 months ago
2005
IEEE
— Schedule synthesis based on reachability analysis of timed automata has received attention in the last few years. The main strength of this approach is that the expressiveness ...
ASYNC
2005
IEEE
15 years 3 months ago
2005
IEEE
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
FMSD
2002
14 years 9 months ago
2002
Combining verification methods developed separately for software and hardware is motivated by the industry's need for a technology that would make formal verification of reali...
FM
2003
Springer
15 years 2 months ago
2003
Springer
We present a novel application on model checking through SPIN as a means for verifying purely descriptive specifications written in TRIO, a first order, linear-time temporal logic ...