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» Partial Order Reduction for Probabilistic Branching Time
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CSFW
2005
IEEE
15 years 3 months ago
Computational and Information-Theoretic Soundness and Completeness of Formal Encryption
We consider expansions of the Abadi-Rogaway logic of indistinguishability of formal cryptographic expressions. We expand the logic in order to cover cases when partial information...
Pedro Adão, Gergei Bana, Andre Scedrov
86
Voted
ANSS
2007
IEEE
15 years 1 months ago
An Accurate and Efficient Time-Division Parallelization of Cycle Accurate Architectural Simulators
This paper proposes a parallel cycle-accurate microarchitectural simulator which efficiently executes its workload by splitting the simulation process along time-axis into many in...
Masahiro Yano, Toru Takasaki, Takashi Nakada, Hiro...
IJPP
2000
94views more  IJPP 2000»
14 years 9 months ago
Path Analysis and Renaming for Predicated Instruction Scheduling
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural m...
Lori Carter, Beth Simon, Brad Calder, Larry Carter...
89
Voted
MFCS
2009
Springer
15 years 2 months ago
Towards a Dichotomy of Finding Possible Winners in Elections Based on Scoring Rules
Abstract. To make a joint decision, agents (or voters) are often required to provide their preferences as linear orders. To determine a winner, the given linear orders can be aggre...
Nadja Betzler, Britta Dorn
DATE
2004
IEEE
184views Hardware» more  DATE 2004»
15 years 1 months ago
Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements
We show how to automatically verify that complex XScale-like pipelined machine models satisfy the same safety and liveness properties as their corresponding instruction set archit...
Panagiotis Manolios, Sudarshan K. Srinivasan