71 search results - page 6 / 15 » Partial Order Reduction for Probabilistic Branching Time |
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PSTV
1992
14 years 10 months ago
1992
We study the effect of three new reduction strategies for conventional reachability analysis, as used in automated protocol validation algorithms. The first two strategies are imp...
ICCD
1999
IEEE
15 years 1 months ago
1999
IEEE
ions", in IEEE Transactions on CAD of VLSI, 25(3):403-412, March, 2006. , E. Mercer, C. Myers, "Modular Verification of Timed Systems Using Automatic Abstraction" in...
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
— The fully parallel LDPC decoding architecture can achieve high decoding throughput, but it suffers from large hardware complexity caused by a large set of processing units and ...
CP
2001
Springer
15 years 2 months ago
2001
Springer
Abstract. Computing lower bounds to the best-cost extension of a tuple is an ubiquous task in constraint optimization. A particular case of special interest is the computation of l...
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ICCAD
2000
IEEE
15 years 1 months ago
2000
IEEE
In this paper, we propose a novel fault-oriented test generation methodology for detection and isolation of faults in analog circuits. Given the description of the circuit-underte...