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» Partial Order Verification of Programmable Logic Controllers
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FPGA
2001
ACM
139views FPGA» more  FPGA 2001»
13 years 10 months ago
A memory coherence technique for online transient error recovery of FPGA configurations
The partial reconfiguration feature of some of the currentgeneration Field Programmable Gate Arrays (FPGAs) can improve dependability by detecting and correcting errors in onchip ...
Wei-Je Huang, Edward J. McCluskey
ITICSE
2003
ACM
13 years 11 months ago
Studying program correctness by constructing contracts
Because the concept of program correctness is generally taught as an activity independent of the programming process, most introductory computer science (CS) students perceive it ...
Timothy S. Gegg-Harrison, Gary R. Bunce, Rebecca D...
DAC
2005
ACM
14 years 7 months ago
A lattice-based framework for the classification and design of asynchronous pipelines
This paper presents a unifying framework for the modeling of asynchronous pipeline circuits. A pipeline protocol is captured in a graph-based model which defines the partial order...
Peggy B. McGee, Steven M. Nowick
FROCOS
2005
Springer
13 years 11 months ago
Connecting Many-Sorted Structures and Theories Through Adjoint Functions
In a previous paper, we have introduced a general approach for connecting two many-sorted theories through connection functions that behave like homomorphisms on the shared signatu...
Franz Baader, Silvio Ghilardi
CACM
1999
92views more  CACM 1999»
13 years 6 months ago
Putting OO Distributed Programming to Work
stractions underlying distributed computing. We attempted to keep our preaims at an abstract and general level. In this column, we make those claims more concrete. More precisely, ...
Pascal Felber, Rachid Guerraoui, Mohamed Fayad