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» Partial Order Verification of Programmable Logic Controllers
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APN
2001
Springer
13 years 10 months ago
Partial Order Verification of Programmable Logic Controllers
We address the verification of programmable logic controllers (PLC). In our approach, a PLC program is translated into a special type of colored Petri net, a so-called register net...
Peter Deussen
IAJIT
2010
84views more  IAJIT 2010»
13 years 4 months ago
A Test Procedure for Boundary Scan Circuitry in PLDs and FPGAs
: A test procedure for testing mainly the boundary scan cells, and testing partially the test access port controller in programmable logic devices, and field programmable gate arra...
Bashar Al-Khalifa
WSC
2000
13 years 7 months ago
Soft-commissioning: hardware-in-the-loop-based verification of controller software
The basic idea of Soft-Commissioning (SoftCom) is to test industrial control software by connecting a controller, e. g. a PLC (Programmable Logic Controller) to a commercial discr...
Harald Schludermann, Thomas Kirchmair, Markus Vord...
ECRTS
1999
IEEE
13 years 10 months ago
Timed automaton models for simple programmable logic controllers
We give timed automaton models for a class of Programmable Logic Controller (PLC) applications, that are programmed in a simple fragment of the language Instruction Lists as defin...
Angelika Mader, Hanno Wupper
ISMVL
1994
IEEE
98views Hardware» more  ISMVL 1994»
13 years 10 months ago
Digital Circuit Verification Using Partially-Ordered State Models
Many aspects of digital circuit operation can be efficiently verified by simulating circuit operation over "weakened" state values. This technique has long been practice...
Carl-Johan H. Seger, Randal E. Bryant