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» Partial Redundancy Elimination for Access Path Expressions
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MICRO
2000
IEEE
176views Hardware» more  MICRO 2000»
14 years 9 months ago
An Advanced Optimizer for the IA-64 Architecture
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel M....
PEPM
1998
ACM
15 years 1 months ago
Type-Directed Partial Evaluation
Abstract. We use a code generator--type-directed partial evaluation-to verify conversions between isomorphic types, or more precisely to verify that a composite function is the ide...
Olivier Danvy
POS
1998
Springer
15 years 1 months ago
Optimizing the Read and Write Barriers for Orthogonal Persistence
Persistent programming languages manage volatile memory as a cache for stable storage, imposing a read barrier on operations that access the cache, and a write barrier on updates ...
Antony L. Hosking, Nathaniel Nystrom, Quintin I. C...
CGO
2003
IEEE
15 years 2 months ago
Optimizing Memory Accesses For Spatial Computation
In this paper we present the internal representation and optimizations used by the CASH compiler for improving the memory parallelism of pointer-based programs. CASH uses an SSA-b...
Mihai Budiu, Seth Copen Goldstein
PLDI
1999
ACM
15 years 1 months ago
Load-Reuse Analysis: Design and Evaluation
Load-reuse analysis finds instructions that repeatedly access the same memory location. This location can be promoted to a register, eliminating redundant loads by reusing the re...
Rastislav Bodík, Rajiv Gupta, Mary Lou Soff...