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    TIM
    2010
    188views Education» more  TIM 2010»
    An Effective Framework to Evaluate Dynamic Partial Reconfiguration in FPGA Systems
    14 years 4 months ago
    An Effective Framework to Evaluate Dynamic Partial Reconfiguration in FPGA Systems
    Download  users.isc.tuc.gr
    Abstract--The most popular representative devices of reconfigurable computing are the Field Programmable Gate Arrays (FPGAs). A promising feature of an FPGA is the ability to reuse...
    Kyprianos Papadimitriou, Antonis Anyfantis, Aposto...
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    ERSA
    2008
    185views Hardware» more  ERSA 2008»
    Design Framework for Partial Run-Time FPGA Reconfiguration
    14 years 11 months ago
    Design Framework for Partial Run-Time FPGA Reconfiguration
    Download  www.hcs.ufl.edu
    Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
    Chris Conger, Ann Gordon-Ross, Alan D. George
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    ISLPED
    2007
    ACM
    79views Hardware» more  ISLPED 2007»
    Post-placement leakage optimization for partially dynamically reconfigurable FPGAs
    14 years 11 months ago
    Post-placement leakage optimization for partially dynamically reconfigurable FPGAs
    Download  cc.ee.ntu.edu.tw
    Chi-Feng Li, Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen...
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    JCP
    2007
    154views more  JCP 2007»
    Partially Reconfigurable Vector Processor for Embedded Applications
    14 years 9 months ago
    Partially Reconfigurable Vector Processor for Embedded Applications
    Download  www.academypublisher.com
    —Embedded systems normally involve a combination of hardware and software resources designed to perform dedicated tasks. Such systems have widely crept into industrial control, a...
    Muhammad Z. Hasan, Sotirios G. Ziavras
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    ICCD
    2006
    IEEE
    157views Hardware» more  ICCD 2006»
    Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
    15 years 6 months ago
    Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
    Download  www.cs.ucr.edu
    By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
    Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
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