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ARC
2008
Springer
89views Hardware» more  ARC 2008»
14 years 11 months ago
A Networked, Lightweight and Partially Reconfigurable Platform
Abstract. In this paper we present a networked lightweight and partially reconfigurable platform assisted by a remote bitstreams server. We propose a software and hardware architec...
Pierre Bomel, Guy Gogniat, Jean-Philippe Diguet
VLSID
2005
IEEE
128views VLSI» more  VLSID 2005»
15 years 10 months ago
On-Line Synthesis for Partially Reconfigurable FPGAs
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
Renqiu Huang, Ranga Vemuri
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
15 years 4 months ago
Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGAâ€...
Matthew French, Erik Anderson, Dong-In Kang
FCCM
2008
IEEE
160views VLSI» more  FCCM 2008»
15 years 4 months ago
Facilitating Processor-Based DPR Systems for non-DPR Experts
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...
Edward Chen, William A. Gruver, Dorian Sabaz, Lesl...
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
15 years 4 months ago
Bitstream relocation with local clock domains for partially reconfigurable FPGAs
—Partial Reconfiguration (PR) of FPGAs presents many opportunities for application design flexibility, enabling tasks to dynamically swap in and out of the FPGA without entire sy...
Adam Flynn, Ann Gordon-Ross, Alan D. George